I2C1 (MIO 16-17)

ZCU111 Evaluation Board User Guide (UG1271)

Document ID

UG1271

Release Date

2023-04-28

Revision

1.4 English

[ This Figure , callout 14]

The I2C bus I2C1 connects the RFSoC U1 PS bank 500, PL bank 64, and system controller U42 to two I2C switches (TCA9548A U26 and U27). These I2C1 connections enable I2C communications with other I2C capable target devices. TCA9548A U26 is pin-strapped to respond to I2C address 0x74. TCA9548A U27 is pin-strapped to respond to I2C address 0x75. This Figure shows a high-level view of the I2C1 bus connectivity represented in Table: I2C1 TCA9548A U26 Adr. 0x74 Connections and Table: I2C1 TCA9548A U27 Adr. 0x75 Connections .

Figure 3-4: I2C1 Bus Topology
X-Ref Target - Figure 3-4

Table 3-6: I2C1 TCA9548A U26 Adr. 0x74 Connections
TCA9548A U26 (Addr 0x74) Port	I2C1 Bus Device	Target Device Address
0	EEPROM U88	0X54
1	Si5341 clock U46	0x36
2	USER Si570 clock U47	0X5D
3	USER MGT Si570 clock U49	0X5D
4	Si5382 (SFP28 ClK recovery) U48	0x68
5	SC18IS602B U93	0x2F
6	LPAF-40 J47 connector	USER
7	No connection	NA

Table 3-7: I2C1 TCA9548A U27 Adr. 0x75 Connections
TCA9548A U27 (Addr 0x75) Port	I2C1 Bus Device	Target Device Address
0	FMCP HSPC J26	0x##
1	Not connected	NA
2	SYSMON U1 BANK 68	0x32
3	PS DDR4 SODIMM SKT. J50	0x51
4	SFP3 P2	0x50
5	SFP2 P1	0x50
6	SFP1 P2	0x50
7	SFP0 P1	0x50

For more information on the TCA9548A and PCA9544A, see the Texas Instruments website [Ref 21] .