[ This Figure , callout 48]
The ZCU111 board provides a pair of SMAs for differential AC coupled user MGT clock input into FPGA U1 GTY bank 130. This differential signal pair is series-capacitor coupled. The P-side SMA J14 signal USER_SMA_MGT_CLOCK_P is connected to U1 MGTREFCLK1P pin T31, and the N-side SMA J15 signal USER_SMA_MGT_CLOCK_N is connected to U1 MGTREFCLK1N pin T32. The transceiver reference clock pin absolute input voltage range is –0.5V min. to 1.3V max. The user SMA MGT clock circuit is shown in This Figure .
