IMPORTANT: THESE INSTRUCTIONS MODIFY THE EFUSES ON THE ZCU102 DEVELOPMENT BOARD AND MAY LIMIT FUTURE USE OF THE DEVELOPMENT BOARD FOR NON-SECURE TESTING AND DEBUGGING!
IMPORTANT: Programming any of the noted eFUSE settings noted in Table 12‐13 Zynq UltraScale+ MPSoC: Technical Reference Manual (UG1085) [Ref 2] preclude Xilinx test access. Consequently, Xilinx might not accept return material authorization (RMA) requests. See the important note below Table 12-13 of the Zynq UltraScale+ MPSoC: Technical Reference (UG1085) [Ref 2] .