Available Example Designs - 3.0 English

DisplayPort 1.4 TX Subsystem Product Guide (PG299)

Document ID
PG299
Release Date
2022-05-04
Version
3.0 English

The following table shows the example designs available for the TX and RX DisplayPort 1.4 subsystems.

Table 1. Available Example Designs
GT Type Topology Video PHY Config 1 Hardware BPC Processor
(TXPLL) (RXPLL)
GTHE3 Pass-through without HDCP1.3 QPLL CPLL KCU105 + Inrevium TB-FMCH-VFMC-DP 8 MicroBlaze™
GTHE4 RX only - CPLL ZCU102 + Inrevium TB-FMCH-VFMC-DP 10 A53
TX only QPLL - ZCU102 + Inrevium TB-FMCH-VFMC-DP 10 A53
FB Pass-through without HDCP1.3/HDCP2.2/2.3 2 QPLL CPLL ZCU102 + Inrevium TB-FMCH-VFMC-DP 10 A53
FB Pass-through with HDCP1.3 and HDCP2.2/2.3 QPLL CPLL ZCU102 + Inrevium TB-FMCH-VFMC-DP 10 A53
MST FB Pass-through without HDCP1.3 and TX only QPLL CPLL ZCU102+ Inrevium TB-FMCH-VFMC-DP 10 A53
GTYE4 RX only - CPLL VCU118 + Inrevium TB-FMCH-VFMC-DP 10 MicroBlaze
TX only QPLL - VCU118 + Inrevium TB-FMCH-VFMC-DP 10 MicroBlaze
GTYE5 TX Only RPLL - VCK190 + Inrevium TBFMCH-VFMC-DP 10 A72
FB Pass-through without HDCP1.3/HDCP2.2/2.3 2 RPLL LCPLL VCK190 + Inrevium TBFMCH-VFMC-DP 10 A72
  1. GT data width is 2 bytes.
  2. Both DP 1.4 TX and DP 1.4 RX Subsystems use the Adaptive-Sync feature.