The PSJTAG toggle detect is a security feature used to trigger a tamper response in the CSU. The toggle detect sends an alert to the CSU if the TCK is toggled. The alert is sticky and remains asserted until a POR is received. The alert to the CSU requires three cycles of TCK to generate. This helps to prevent false detects from board power-up or other circumstances.
The tamper response is only serviced by the CSU boot ROM when the tamper response register is set in the CSU. The JTAG toggle detect is disabled in the CSU if any of the JTAG security gates are disabled. This allows secure software to have a built-in debug mode.
The tamper sources originate external to the CSU (mostly) and are tied to the interrupts of the Secure Processor Block (SPB). When an interrupt is triggered to the SPB, the CSU ROM will read the tamper response register associated with that interrupt and execute the instruction contained in the register. Tamper sources include:
1.AMS alarms (19-bits)
2.External pin via MIO
3.Register in CSU
4.eFuse indicating that the PS has been disabled (from PL)
5.JTAG toggle detect
6.PL SEU error indication
7.JTAG_TOGGLE_DETECT is tied to the interrupts of SPB.