This Figure is a block diagram of the TTC. The clock-in and wave-out multiplexing for the timer/clock 1 is controlled by the slcr.MIO_PIN_xx registers. If no selection is made in these registers, then the default becomes the EMIO interface.
This Figure is a block diagram of the TTC. The clock-in and wave-out multiplexing for the timer/clock 1 is controlled by the slcr.MIO_PIN_xx registers. If no selection is made in these registers, then the default becomes the EMIO interface.
