eMMC v4.51 Boot Mode

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

There are two SD_eMMC controllers on the Versal adaptive SoC. The SD_eMMC controllers can be used for SD or eMMC mode, and they are mutually exclusive. The SD_eMMC1 controller is used for the eMMC v4.51 boot mode.

The SD_eMMC1 controller is used for the eMMC v4.51 boot mode. The FAT 16/32 file systems and select raw partition combinations are supported for reading the boot images from the eMMC flash for primary boot. Raw partitions, not formatted and without a file system, are supported for primary boot mode, the boot partition 1, boot partition 2, or the user area of the eMMC. Using eMMC FAT 16/32 file system for primary boot mode and eMMC as secondary boot mode is not supported. The image search limit for eMMC1 boot mode is listed in the table in Boot Search Limit. See the Versal Adaptive SoC System Software Developers Guide (UG1304) for additional details on supported raw boot options.

In the eMMC1 boot mode, the RCU BootROM runs at an eMMC1 device clock frequency between 8.7 MHz and 19.3 MHz dependent on the REF_CLK frequency. The eMMC1 boot mode supports 1.8V and 1-bit, 4-bit, and 8-bit data interfaces. The BootROM uses auto-width detection to determine the data bus width for initial boot. The auto-bus width detection starts by checking the 8-bit data bus width, followed by 4-bit data bus width, and then 1-bit data bus width.

Note: When connecting to the eMMC1 controller using a 1-bit data bus width, note the detection order because the remainder of the 8-bit data bus MIO data pins toggle during the initial bus-width detection.

For additional information on the SD_eMMC controllers, see the SD_eMMC Controller chapter. For details on eMMC flash support, see the Vivado Design Suite User Guide: Programming and Debugging (UG908).