QSPI Flash Boot Mode

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The Versal adaptive SoC supports a 24-bit addressing mode (QSPI24) boot mode or a 32-bit addressing (QSPI32) boot mode option. The QSPI32 boot mode option addresses flash sizes are greater than 128 Mb. The QSPI boot mode supports multiple data bus widths and setups. In the QSPI boot modes, the BootROM runs at a QSPI device clock frequency between 11 MHz and 24.5 MHz dependent on the REF_CLK frequency setting. For additional information on the quad SPI controller, see Quad SPI Controller chapter.

For details on QSPI flash support, see the Vivado Design Suite User Guide: Programming and Debugging (UG908).

Boot Mode Setups

The following table lists the QSPI boot mode setups that are supported.

Table 1. Boot Mode Setups
Quad SPI Setup Flash Device Count Chip Select Count Data Width Max
Single (1-bit, 2-bit, 4-bit) 1 1 4
Dual-stacked 1 (1-bit, 2-bit, 4-bit) 2 2 4
Dual-parallel (8-bit) 2 2 8
  1. When using QSPI dual-stacked mode, the BootROM can only access the lower QSPI addressable flash memory space for boot. After boot, the PLM can access the upper QSPI for additional image storage.

The boot mode image search limits are listed in Table 1.