Mode Transition

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The mode transitions are shown in the following figure. The transitions are primarily controlled by the resets, Sw_Reset [CEN] bit, SRR register settings, and a hardware wake-up mechanism.

The mode transition conditions are shown in the Mode Table.

Figure 1. CAN Mode Transition Diagram