Processor Memory Datapaths

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

AXI Processor Access to CPU Memory

The TCMs can be loaded with code and data coefficients by other processors when the RPU is in halt mode. The RPU and TCMs must be powered on and the RPU must be out of reset.

Datapaths

The following figure shows the datapaths to these memories.

Figure 1. CPU Memory Datapaths