Stream IDs

Versal Adaptive SoC Technical Reference Manual (AM011)

Document ID
AM011
Release Date
2023-10-05
Revision
1.6 English

The SMMU uses a 15-bit stream ID to perform address translations. This information is part of a transaction and indicates which processor or DMA unit originated the request.

Stream ID bits [9:0] are the same as the system management ID (SMID) bits (see APU SMID Bits [3:0]). Stream bits [14:10] are assigned by the TBU that the transaction passes through. There are seven TBUs:

  • TBU 0 appends 000_00b
  • TBU 1 appends 000_01b
  • Etc.
  • TBU 6 appends 001_10b