Description

76889 - Versal HDIO/MIO: When powered at 3.3V or 2.5V a race condition can exist between data and tristate

Release Date
2021-12-15

The Versal families MIO and HDIO banks can be powered at 2.5V or 3.3V. When using a tristate control at 3.3V and 2.5V drivers, a race condition can exist between data and the tristate control that could result in an incorrect output value.

There is a minimum skew requirement for the Data and T (tristate) signals as shown in Figure 1.  

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Figure 1: Tristate/Data transitions that can lead to the race condition


The following use cases might involve the use of tristate with 3.3V and 2.5V:
  1. HDIO – OBUFTIOBUFT 
  2. Sysmon I2C/PMBus usage 
  3. MIO SelectMAP Interfaces
  4. MIO USB2.0 Interfaces
  5. JTAG TDO
  6. JTAG HDIO EXTEST and JTAG MIO EXTEST
  7. GTS assertion
  8. SRST assertion
 

Note: not all device/package combinations have HDIO banks.