The ZynqMP USB 3.0 Controller shall provide one 5.0Gbit/s USB channel using the PS internal GT as PHY.
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Two USB 2.0/3.0 controllers
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Compliant with USB 3.0 specs
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Compliant with xHCI standard
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Supports 5.0 Gbps data rate
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Support host and device modes
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Support On The Go (OTG) host/device selection
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Provide simultaneous operation of the USB2.0 and USB3.0 interfaces where applicable
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In host mode, as required by the standard for speed negotiation and switching
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In device mode, statically configured as USB2.0 or USB3.0
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64-bit AXI master port with built-in DMA
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Register programming via AXI and/or APB slave ports
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Power management features: hibernation mode
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Support 44-bit address space
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Supports Link Power Management (LPM) transfers to save power when the bus is idle