Readback of configuration registers

This example prints out the values of all the configuration registers related to FPGA

Expected Output

Register Read back example
Value of the Configuration Registers.
CRC ->   0 
FAR ->   7fc0000   
FDRI ->      0 
FDRO ->      effffffe  
CMD ->   d 
CTRL0 ->     101   
MASK ->      0 
STAT ->      16907ffc  
LOUT ->      0 
COR0 ->      38003fe5  
MFWR ->      0 
CBC ->   0 
IDCODE ->    1484a093  
AXSS ->      0 
COR1 ->      400000    
WBSTR ->     0 
TIMER ->     0 
BOOTSTS ->   1 
CTRL1 ->     0
Successfully ran Register Read back example