• It uses dmam_alloc_coherent() to allocate DMA memory which is non-cached for a s/w coherent system. The memory is to be shared with user space for DMA buffers.
• It provides a character interface to user space to allow an application to map the kernel memory into user space and initiate DMA transactions. The ioctl function starts the transaction and waits for it to complete such that it is a blocking interface.
• It controls the transmit and receive channels of the Xilinx DMA driver through the DMA Engine.
• It provides an internal test mode which allows the kernel driver to test a single DMA transfer without any user space application. This helps when testing changes to the kernel driver. It is controlled with a kernel module parameter.

• It accesses the kernel driver thru character device nodes, one for each DMA channel (transmit and receive).
• It maps the kernel memory buffer into user space such that no copy between kernel and user space is required.
• It uses the kernel memory for DMA transmit and receive buffers.
• It initiates DMA transactions and waits for their completion through the driver ioctl function.