Devicetree (for 2017.4 and earlier releases)

pinctrl0: pinctrl@ff180000 {
        compatible = "xlnx,pinctrl-zynqmp";
        status = "disabled";
        reg = <0x0 0xff180000 0x0 0x1000>;
 
        pinctrl_uart1_default: uart1-default {
                mux {
                        groups = "uart0_4_grp";
                        function = "uart0";
                };
 
                conf {
                        groups = "uart0_4_grp";
                        slew-rate = <SLEW_RATE_SLOW>;
                        io-standard = <IO_STANDARD_LVCMOS18>;
                };
 
                conf-rx {
                        pins = "MIO18";
                        bias-high-impedance;
                };
 
                conf-tx {
                        pins = "MIO19";
                        bias-disable;
                        schmitt-cmos = <PIN_INPUT_TYPE_CMOS>;
                };
        };
};