1. Direct mode of memory mapped operation.
2. Software triggered IO mode (STIG) up to 8-bytes of data transfers.
3. Indirect DMA reads.
4. NON-DMA read and write support
5. Local SRAM to reduce AHB overhead.
6. Supports SDR and DDR protocols.
7. Programmable master mode clock frequencies.
8. Serial clock with programmable polarity.
9. Programmable peripheral selects (chip select).
10. Support for Single and Octal instructions.
11. Interrupts and polled based operations.