Note:
In order to test the hardware platform, a 1588 timestamp capable timer is required at the h/w level.
Prerequisite for 1588 testing:
axi_ethernet_eth_buf: ethernet@40c00000 { axistream-connected = <&axi_dma_1>; axififo-connected = <&axi_fifo_0>; clock-frequency = <100000000>; clocks = <&clk_bus_0>; compatible = "xlnx,axi-ethernet-1.00.a"; device_type = "network"; interrupt-parent = <µblaze_1_axi_intc>; interrupts = <4 2>; reg = <0x40c00000 0x40000>; xlnx,phy-type = <0x4>; xlnx,phyaddr = <0x1>; xlnx,rxcsum = <0x0>; xlnx,rxmem = <0x8000>; xlnx,txcsum = <0x0>; xlnx,txmem = <0x8000>; phy-handle = <&phy0>; mdio { #address-cells = <1>; #size-cells = <0>; phy0: phy@7 { compatible = "marvell,88e1111"; device_type = "ethernet-phy"; reg = <7>; }; }; };
MRMAC 1588 support is tested with Xilinx 1588 Timer-Syncer block details of which can be found here:
https://github.com/Xilinx/linux-xlnx/blob/master/drivers/ptp/ptp_xilinx.c