Setup and Build: OSL
Images required for testing the FPGA Manager
- Bin/Bit file
- DTBO file
DTBO File Generation:
-
Steps to Create the DT-Overlay Fragment
- Clone the device-tree-xlnx repo: git clone device-tree-xlnx.git
-
Helper script:
dt_overlay.tcl
- Command: # xsct dt_overaly.tcl system.hdf psu_cortexa53_0 device-tree-xlnx output_dir
Ex: xsct dt_overaly.tcl system.hdf psu_cortexa53_0 ${DTS_REPO}/device-tree-xlnx overlay
2. Create Device Tree Overlay Blob (.dtbo) file from the pl.dtsi file
# dtc -O dtb -o pl.dtbo -b 0 -@ pl.dtsi
Ex: ./scripts/dtc/dtc -O dtb -o pl.dtbo -b 0 -@ pl.dtsi
3. Copy the generated bit and dtbo files to target
Note: PL nodes should not be the part of Base Device-tree (system.dtb).
- If the PL nodes are part of static dtb (system.dtb), these nodes cannot be removed at run-time.