2022.3
- None.
2022.2
- fpga: zynqmp: Add feature-list validation check
- firmware: xilinx: Update the zynqmp_pm_fpga_load() API
- fpga: zynqmp-fpga: Remove empty function
- fpga: zynqmp: Make word align the configuration data
2022.1
-
FPGA Manager framework upgraded to 5.15v
2021.2
- None
2021.1
-
FPGA Manager framework upgraded to 5.10v
2020.2
Summary:
- fpga: zynqmp: Use the scatterlist interface
- fpga: zynqmp: Initialized variables before using it
- fpga: zynqmp: Fix incorrect variables type
Commits :
- 4823227 fpga: zynqmp: Use the scatterlist interface
- aac8be7 fpga: zynqmp: Initialized variables before using it
- 2899bc8 fpga: zynqmp: Fix incorrect variables type
2020.1
- None
2019.2
Summary:
- fpga: zynqmp-fpga: Adds status interface
Commits :
- 8e85861 fpga: zynqmp-fpga: Adds status interface
2019.1
Summary:
- fpga: Fix bitstream typo error
- Merge tag 'v4.19' into master
- fpga: ZynqMP: Adds support for Authentication of bitstreams usning User-key
- drivers: xilinx: Reorganize firmware driver for zynqmp
- drivers: Defer probe if firmware is not ready
- fpga: zynqmp: Revert Authentication of bitstreams using User-key changes
- fpga: zynqmp: Use SPDX license header
Commits:
- e732840 fpga: Fix bitstream typo error
- 26a8a4d Merge tag 'v4.19' into master
- c609186 fpga: ZynqMP: Adds support for Authentication of bitstreams usning User-key
- 3f9e46d drivers: xilinx: Reorganize firmware driver for zynqmp
- 6a63448 drivers: Defer probe if firmware is not ready
- 8d43780 fpga: zynqmp: Revert Authentication of bitstreams using User-key changes
- 3384284 fpga: zynqmp: Use SPDX license header
2018.3
Summary:
- Added support for vivado generated bit and bin file loading
- Added support for PL configuration readback
- Added support for clock framework
Commits:
- daca3d fpga: zynqmp: Adds support to load vivado generated .bit and .bin files
- bd1f10 fpga: zynqmp-fpga: Add support for pl configuration readback
- 097ea7 fpga: zynqmp-fpga: Add support for clock framework
2018.2 Summary:
- Added Support for Partial Reconfiguration
Commits :
- No Changes in the driver (Changes are done in the xilfpga library).
2018.1 Summary:
- soc: zynqmp: Define EEMI ops structure
- soc: zynqmp: Use new firmware APIs
- fpga: zynqmp: sync driver with xilfpga library enhancements
- fpga: zynqmp: Remove useless blank line in zynqmp_fpga_remove
Commits:
- 31c2a5e soc: zynqmp: Define EEMI ops structure
- 0b7483c soc: zynqmp: Use new firmware APIs
- 45ec97f fpga: zynqmp: sync driver with xilfpga library enhancements
- fbf0102 fpga: zynqmp: Remove useless blank line in zynqmp_fpga_remove
2017.4
- None
2017.3 Summary:
- zynqmp: Use new firmware.h instead of pm.h
- Revert "fpga manager: Adopted Authenticated Bitstream loading support for Xilinx"
Commits:
- 5e81ba5 zynqmp: Use new firmware.h instead of pm.h
- a7fbcf3 Revert "fpga manager: Adopted Authenticated Bitstream loading support for Xilinx"
2017.2
- None
2017.1 Summary:
- fpga manager: Adopted Encrypted Bitstream loading support for Xilinx ZynqMp.
- fpga: zynqmp: Fix ZynqMP name in print.
- fpga manager: Adopted Authenticated Bitstream loading support for Xilinx.
- fpga: zynqmp: Add fpga image information struct.
Commits:
- a17a6e1 fpga manager: Adopted Encrypted Bitstream loading support for Xilinx ZynqMp.
- 7130ff7 fpga: zynqmp: Fix ZynqMP name in print.
- ed5a141 fpga manager: Adopted Authenticated Bitstream loading support for Xilinx.
- b8bc48c fpga: zynqmp: Add fpga image information struct.
2016.4
- None
2016.3 Summary:
- fpga manager Adding FPGA Manager support for Xilinx zynqmp Soc
- fpga: Removed warning from zynqmp-fpga.c compilation.
Commits: