AI Engine GMIO Performance Profile - 2023.2 English

Vitis Tutorials: AI Engine (XD100)

Document ID
XD100
Release Date
2024-03-05
Version
2023.2 English

AI Engine tools support one-to-one mapping between GMIO ports and tile DMAs. It does not support mapping multiple GMIO ports to one tile DMA channel. There is a limit to the number of GMIO ports that can be supported for a given device. For example, the XCVC1902 device on the VCK190 board has 16 AI Engines to NoC master unit (NMU) in total. For each AI Engine to NMU, two MM2S and two S2MM channels are supported. Therefore, a maximum of 32 AI Engine GMIO inputs and 32 AI Engine GMIO outputs are supported. However, note that these numbers can be further limited by the existing hardware platform.

In this example, four AI Engine GMIO inputs and four AI Engine GMIO outputs are utilized in the graph and the performance for the graph is profiled through various ways. You will learn about the usage of GMIO for data transfer in this tutorial.