AI Engine RTP Signals - 2023.2 English

Vitis Tutorials: AI Engine (XD100)

Document ID
XD100
Release Date
2024-03-05
Version
2023.2 English

As mentioned in the Overview, this design is sending RTP values to the AI Engine through the graph.update() host application. From the host code, you can see that there are two updates being done, both with an array size of 12. Because these only apply to the AI Engine kernel, these will write signals to the AIENGINE/S00_AXI interface. However, there are other signals that show the same values because these are the interfaces the data traverses to the destination.

  1. Run the following Tcl script to see only the AI Engine signal.

    source ../../../../tcl/rtp_signals.tcl
    
  2. Expand the AIENGINE group, vitis_design_ai_engine_0_0_S00_AXI interface, and expand the Outstanding Writes. You will see some write transactions; go to the second visible instance shown in the following figure.

    RTP zoom loc

  3. Zoom into the transaction of writes until you can see something similar to the following screenshot.

    RTP Signals

    NOTE: Depending on the time the host application runs, you will not see the exact same times.

    Here you can see that there are 12 writes that are being sent to the AI Engine, which are the RTP coefficients that are to be updated in the design.

    Expand Row 0, and hover the mouse where it says Data. You will see a pop-up as shown in the following figure.

    RTP One

    You can see that there is data presented here. It is in the radix of hexidecimal, and reads 0xB4. Converting this to decimal is 180, which is the first coefficent in the area for updates.

    TIP: There are two RTP updates occurring. If you follow the same write signal, you will find the write transactions for the second update.

  4. Click the Zoom to Fit button.