Now program the hardware image on to the VCK190 device, and create an
xrt.inifile as follows:
//xrt.ini [Debug] aie_status=true aie_status_interval_us=1000
Run the application,
When the host program is running, the AI Engine status is copied to the
xrt.run_summaryfile. A summary of the output files are:
xrt.run_summary: Run summary that contains list of files information that can be used by the Vitis Analyzer.
aie_status_edge.json: Status of AI Engine and AI Engine memory.
aieshim_status_edge.json: AI Engine interface tiles status.
summary.csv: Always created.
You can also see the following messages in the console indicating the actual deadlock:
HOST: EXE: /run/media/mmcblk0p1/host.exe [XRT] WARNING: Potential deadlock/hang found in AI Engines. Graph : mygraph [XRT] WARNING: Potential stuck cores found in AI Engines. Graph : mygraph Tile : (25,1) Status 0x401 : Enable,Stream_Stall_SS0
Observe the hang, and kill the application by pressing
Ctrl+cor suspend using
Copy all these files back to the local workspace where the AI Enigne compile
Work/directory is present, and open the
xrt.run_summaryfile in the Vitis Analyzer.
vitis_analyzer --classic xrt.run_summary`
Click Set AI Engine Compile Summary, point to the
Work/directorymanually, and observe the
graphview to identify the stalls.
The highlighted path in the graph indicates the stalls in the design. You can also look at the following Tile Status table to get status of each tile, stalled port, etc. Clicking each stall highlights the corresponding path in the graph view.
Tile Status - Status column: Shows the Tiles (24,0),(25,0) are in lock stall and the tile (25,1) is in stream stall. If there are no stalls, you can see the
Tile Status - Stalled Net/Port: Shows the corresponding Nets/Ports where the stall happened. Observe the small bubble at the stream port of the peak_detect kernel in the graph view.
Tile Status - PC: Shows the current Program Counter value. It can be crossprobed with the compiler generated source code by clicking on it.
DMA Status: Shows each tile’s DMA input/output channel status.
For more information, refer to Analyzing AI Engine Status in Vitis Analyzer in AI Engine Tools and Flows User Guide (UG1076).