Copy the files in
src
anddat
to your project. Set theTop-Level File
tosrc/tb.cpp
.Since we are only interested in functional verification now, we use
Emulation-SW
to build and run the program.If the program builds and runs without errors, the output should be
Emulation-SW/x86simulator_output/output.dat
.Copy the generated
impresponse.dat
file to thedata
directory.We can use Julia to verify the kernel output.
julia> using PyPlot
julia> using DelimitedFiles
julia> ref = readdlm("{specify_directory}/impresponse.dat");
julia> dut = readdlm("{specify_directory}/output.dat");
julia> err = ref - dut;
julia> plot(err);
julia> grid("on");
julia> title("Impulse Response Error");
julia> xlabel("Sampling Index");
julia> ylabel("Error");
julia> eps(Float32)
1.1920929f-7
julia> maximum(abs.(err))
1.0517072768223557e-8
You may also try modifying and running check.jl
.
$ julia
julia> include("check.jl")
# type Ctrl-D to exit Julia
The resulting Julia plot of the impulse response error should look something like that shown below:
Since the maximum absolute error is less than the machine epsilon for binary32 (Float32
in Julia), we can conclude that the kernel code is working as expected.
The complete design is included in the data
and src
directories. Refer to the aie_exp/Part1 tutorial if you are unfamiliar with building an AMD Vitis™ design from scratch.