Build for Hardware Emulation and Hardware Flow - 2023.1 English

Vitis Tutorials: AI Engine Development

Document ID
XD100
Release Date
2023-10-03
Version
2023.1 English

In the previous step, you generated the AI Engine design graph (libadf.a) using the AI Engine compiler. Note that the graph has instantiated a PLIO (adf::output_plio in aie/graph.h), which will be connected to the PL side.

out = adf::output_plio::create("Dataout", adf::plio_32_bits, "data/output.txt");

Here, plio_32_bits indicates the interface to the PL side is 32 bits wide. In the PL side, an HLS kernel s2mm will be instantiated. It will receive stream data from the AI Engine graph, and output data to global memory, which will be read by the host code in the PS.

Note: In this section, the make commands apply to hw_emu mode by default. Taking the hw_emu mode as an example, to target hw mode, add TARGET=hw to the make commands. For detailed commands, change the -t hw_emu option to -t hw.

To compile the HLS PL kernel, run the following make command:

make kernels

The corresponding v++ compiler command is as follows:

v++ -c --platform xilinx_vck190_base_202310_1 -k s2mm s2mm.cpp -o s2mm.xo --verbose --save-temps

Switches for the v++ compiler are as follows:

  • -c: compiles the kernel source into Xilinx object (.xo) files.

  • --platform: specifies the name of a supported platform as specified by the PLATFORM_REPO_PATHS environment variable, or the full path to the platform .xpfm file.

  • -k: specifies the kernel name.

The next step is to link the AI Engine graph and PL kernels to generate the hardware platform. The make command for this is as follows:

make xclbin

This may takes some time to complete. The corresponding v++ linker command is as follows:

v++ -g -l --platform xilinx_vck190_base_202310_1 pl_kernels/s2mm.xo libadf.a -t hw_emu --save-temps --verbose --config system.cfg -o vck190_aie_base_graph_hw_emu.xclbin

Switches for the v++ linker are as follows:

  • -l: links the PL kernels, AI Engine graph, and platform into an FPGA binary file (xclbin).

  • -t: specifies the link target, hw for hardware run, hw_emu for HW emulation.

  • --config: specifies the configuration file. The configuration file (system.cfg) specifies stream connections between the Graph and PL kernels, and other optional selections.

After generating the hardware platform, compile the host code (sw/host.cpp) using the following make command:

make host

The detailed commands for compiling the host code are as follows:

${CXX} -c -I$SDKTARGETSYSROOT/usr/include/xrt/ -o host.o host.cpp
${CXX} -o ../host.exe host.o -lxrt_coreutil 

Here, the cross-compiler pointed by CXX is used to compile the linux host code.

The host code for HW emulation and HW (sw/host.cpp) includes XRT APIs to control the executions of the graph and PL kernels.

The next step is to use v++ with -p to generate the package file. The make command is:

make package

The corresponding v++ command is:

v++ -p -t hw_emu -f $PLATFORM_REPO_PATHS/xilinx_vck190_base_202310_1/xilinx_vck190_base_202310_1.xpfm \
	--package.rootfs $PLATFORM_REPO_PATHS/sw/versal/xilinx-versal-common-v2023.1/rootfs.ext4  \
	--package.kernel_image $PLATFORM_REPO_PATHS/sw/versal/xilinx-versal-common-v2023.1/Image  \
	--package.boot_mode=sd \
	--package.image_format=ext4 \
	--package.defer_aie_run \
	--package.sd_dir data \
	--package.sd_file host.exe vck190_aie_base_graph_hw_emu.xclbin libadf.a

Here --package.defer_aie_run specifies that the AMD Versal™ AI Engine cores will be enabled by the PS. When not specified, the tool will generate CDO commands to enable the AI Engine cores during PDI load instead.

  • --package.sd_dir <arg> specifies a directory path to package into the *sd_card* directory/image, which is helpful for including some golden data into the package.

  • --package.sd_file <arg> is used to specify files to package into the *sd_card* directory/image.

For more details about v++ -p (--package) options, refer to the Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393).