Clock Connections - 2022.2 English

Vitis Tutorials: AI Engine Development

Document ID
XD100
Release Date
2022-12-01
Version
2022.2 English

The first connection you created connects the SYS_CLK1_IN_0_1 port (created at the beginning of the dr.bd.tcl script) with the SYS_CLK0_IN input port of the Simulation Clock and Reset Generator IP.

The SYS_CLK0 pin of the Simulation Clock and Reset Generator IP is then connected to the sys_clk0 pin of the NoC.