Clock Infrastructure - 2023.2 English

Vitis Tutorials: AI Engine

Document ID
XD100
Release Date
2023-11-29
Version
2023.2 English

Seven instances of the Processor Reset System IP and an instance of the Clocking Wizard are created. The Clocking Wizard is configured to generate seven output clocks (for example, CLOCKOUT_REQUESTED_OUT_FREQUENCY= 100 MHz, 250 MHz, 500 MHz, 400 MHz, 450 MHz, 250 MHz). It is recommended to also instantiate a Process Reset System IP is for each output clock to ensure proper clocking. Several clocks tied to the same reset can result in adverse affects such as cross-clock domain issues.