Enable ILA in the Design - 2023.2 English

Vitis Tutorials: AI Engine

Document ID
XD100
Release Date
2023-11-29
Version
2023.2 English

The v++ --debug opiton is used to enable the ILA IP core and insert in the design. This needs to be specified during the linking stage in the design cycle.

  1. Open the Makefile, locate the VPP_LINK_FLAGS, and add the following options to the existing ones:

    --debug.chipscope s2mm_1:s --debug.chipscope s2mm_2:s --debug.chipscope mm2s:s
    

    Notice here the s2mm_1:s,s2mm_2:s, and mm2s:s. The syntax is <Compute Unit name>:<Interface name>.

    Make sure the compute unit name matches with the one specified in the system.cfg file. In this exercise, monitor the stream output from mm2s module going to theAI Engine, going to s2mm module.

    NOTE: V++ allows multiple --debug.chipscope lines to meet design debug needs.

  2. Build the design. Especially, if you have already compiled the AI Engine design and PL modules, it is required to run the linking step in the Makefile and repackage to generate the SD card image.

    make clean
    make all
    
  3. Inspect the ILA insertion by opening AMD Vivado™, and click Open Block Design in IP INTEGRATOR.

    vivado _x/link/vivado/vpl/prj/prj.xpr`
    

    vivado ila

  4. Flash the SD card with the ILA-enabled design, plug in the flashed SD card on to the VCK190 SD card slot, and boot up the board.