Note the following limitations of the waveform viewer.
Signals internal to the AI Engine can be viewed using VCD. They are not integrated in the general XSIM Waveform GUI.
CIPS, (QEMU model) which executes the software program, is purely a functional model with no timing accuracy. The NoC, DDR memory, and AI Engine are cycle-approximate models.
Bandwidth and latency estimation are approximate, based on the accuracy of the individual IP models.