Prepare the HW-Link Project - 2023.1 English

Double click the PeakDetect_system_hw_link -> PeakDetect_system_hw_link.prj, and change the number of compute units for s2mm as 2 by double-clicking and editing the value. This is because for the design, there is one input PLIO port and two output PLIO ports.

Specify the system.cfg file that contains the connections between the PL and AI Engine kernels. To do this, right-click the binary_container_1, and select Edit V++ Options.

Add the v++ command line option --config ../system.cfg as shown below and click Apply and Close.

Right-click the PeakDetect_system_hw_link, and select Import sources.

Browse to the cmd_src directory, and choose the system.cfg file. In the Into folder field, browse to the hw_link project.

Click Finish.

While creating a HW-link project, by default, the Vitis IDE tool creates the binary_container_1-link.cfg file under {$PROJECT}/{BUILD_TARGET}/ that contains the connectivity.

[connectivity]
nk=mm2s:1:mm2s_1
nk=s2mm:2:s2mm_1.s2mm_2

To port a command line project to a Vitis IDE environment, make sure to remove the above connectivity statements that starts with nk in your system.cfg file. Also make sure the compute unit names in system.cfg file matches with the names mentioned in connectivity. To do this, use the following steps.

Double-click the system.cfg file, and modify the sc=mm2s.s:ai_engine_0.inx to sc=mm2s_1.s:ai_engine_0.inx.