Step 3. Configure Hardware Linking Project - 2022.2 English

Vitis Tutorials: AI Engine Development

Document ID
XD100
Release Date
2022-12-01
Version
2022.2 English

Now that you have imported the kernels, you need to tell the Vitis linker how to connect everything together.

  1. In the simple_application_system_hw_link.prj page, enable Export hardware (XSA).

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  1. Now you need to tell the Vitis compiler about the connectivity of the system. This step is done using a configuration file. Create a connectivity.cfg file with a text editor and add the following lines.

[connectivity]
stream_connect=mm2s_1.s:ai_engine_0.mygraph_in
stream_connect=ai_engine_0.mygraph_out:s2mm_1.s

Note that as per the Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393), the naming convention for the compute units (or kernel instances) are <kernel>_#, where # indicates the CU instance. Thus the CU names built corresponding to the kernels mm2s and s2mm in your project are respectively mm2s_1 and s2mm_1. The stream_connect option is defined as <compute_unit_name>.<kernel_interface_name>:<compute_unit_name>.<kernel_interface_name>. For example, to connect the AXI4-Stream interface of the mm2s_1 (compute unit name) called s (kernel interface name) to the mygraph_in (interface name) input of the graph in the ai_engine_0 (compute unit name) IP you need the following option: stream_connect=mm2s_1.s:ai_engine_0.mygraph_in.

  1. Right-click the simple_application_system_hw_link and click import sources. Select the connectivity.cfg file created and add it to the simple_application_system_hw_link folder.

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  2. In the simple_application_system_hw_link.prj page, right-click the binary container and click Edit v++ options.

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Add the following option in the V++ command line options section to link your configuration file:

--config ../connectivity.cfg

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