ACTION: Back out the change before proceeding. Select the Source Code tab to make it active and display the Directive view. Right-click on HLS BIND_STORAGE pragmas and select Remove Directive.
Another approach to solve memory port conflicts is to use the ARRAY_PARTITION directive to reconfigure the structure of an array. ARRAY_PARTITION lets you partition an array into smaller arrays or into individual registers instead of one large array. This effectively either increases the amount of read and write ports for the storage and potentially improves the throughput of the design.
However, ARRAY_PARTITION also requires more memory instances or registers, and so increases area and resource consumption. For more information, refer to ARRAY_PARTITION in the Vitis HLS Flow of the Vitis Unified Software Platform Documentation (UG1416). If partitioning large arrays, this can also increase the compile time.
In the Directives view, select the array variables, col_inbuf and buf_2d_out from the associated II violations.
Right-click and select Add Directive.
This opens the Vitis HLS Directive Editor as shown in the following figure.
In the Vitis HLS Directive Editor, make the following selections:
For Directive, select ARRAY_PARTITION.
For Destination, select Directive File.
In Options, the variable you previously selected should be listed. 1.Leave the dimension set to 1, the default value.
Specify a factor of 8.
Select cyclic for the type.
Click OK to close the form, and apply the directive.
Repeat the steps above for the
Click C Synthesis to rerun the synthesis to see the results.
Re-examine the Synthesis Summary report to see the details of your synthesized design.
The reason for choosing a cyclic partition with a factor of 8 has to do with the code structures involved. The loop is processing an 8x8 matrix, which requires taking eight passes through the outer loop, and eight passes through the inner loop. By selecting a cyclic array partition, with a factor of 8, you are creating eight separate arrays that each get read one time per iteration. This eliminates any contention for accessing the memory during the pipeline of the loop.