Create a workspace and launch AMD Vivado™
source <Vitis_Install_Directory>/settings64.shto setup Vivado running environment
Run Vivado by typing
vivadoin the console.
Download the Versal Extensible Embedded Platform Example
Click menu Tools -> Vivado Store.
Click OK to agree to download open source examples from web.
Select Platform -> Versal Extensible Embedded Platform and click the download button on the tool bar.
Click Close after installation complete.
Create the Versal Extensible Embedded Platform Example project
Click File -> Project -> Open Example.
Select Versal Extensible Embedded Platform in Select Project Template window.
Input project name and project location. Keep Create project subdirectory checked. Click Next.
Select target board in Default Part window. In this example, we use Versal VCK190 Evaluation Platform. Click Next.
Note: Please select Versal VEK280 Pre-production board if you target vek280.
Configure Clocks Settings. You can enable more clocks, update output frequency and define default clock in this view. In this example, we can keep the default settings.
Configure AXI master and Interrupt Settings. You can choose how many interrupt and AXI masters this platform should support. 63 interrupts modes use two AXI_INTC in cascade mode. In this example, we can keep the default setting.
Enable the AI engine according to your requirement. In this example, we can keep the default setting.
Review the new project summary and click Finish.
After a while, the design example is generated.
The generated design is shown in the following figure:
At this stage, the Vivado block automation has added a Control, Interface & Processing System (shorten with CIPS in the future) block, AXI NOC block, AI Engine, and all supporting logic blocks to the diagram, and applied all board presets for the VCK190 or VEK280.
Note: The block design of the VEk280 is slightly different from that of the VCK190. While the VCK190 incorporates one DDR4 and one LPDDR4, the VEK280 elevates its performance with the inclusion of two LPDDR4s.
Generate Block Diagram
Click Generate Block Diagram from the Flow Navigator window.
Select Synthesis Options to Global to save generation time.
Click Generate button.
Note: It is safe to ignore this critical warning. Vitis will connect this signal in the future.
Export hardware platform with the following scripts:
Click File -> Export -> Export Platform. Alternative ways are: Flow Navigator window: IP Integrator -> Export Platform, or the Export Platform button on the bottom of Platform Setup tab.
Click Next on Export Hardware Platform page.
Select Hardware and hardware emulation. Click Next.
Select Pre-synthesis, because we are not making an DFX platform. Click Next.
Input Name: Custom_Platform, click Next.
Update file XSA file name to vck190_custom, click Next.
Review the summary. Click Finish.
vck190_custom.xsa file is generated in Vivado project location directory.
Note: If there are any IPs that do not support simulation, generate Hardware XSA and Hardware Emulation XSA separately.
Note: If you target VEK280, please update XSA name to vek280_custom.