The Tcl script ./tcl/pack_kernel.tcl is provided to package the IP files and RTL modules as described above to a Vitis kernel file. Here are some important points to consider:
The init_clk signal in the top level is automatically inferred as clock interface, but it is manually removed from the interface in the script. The reason is that you would want to manually connect this clock pin to the designated clock source pin, so remove it from clock interface to avoid auto connection in the Vitis linking stage.
In addition to the auto inferred AXI / AXI stream interfaces, manually infer the pre-defined differential gt_port type interface, and bond the top-level GT TX/RX signals to the interface. Thus, we easily connect the GT interface to the QSFP interface provided in the Alveo target platform.
In addition to the auto inferred normal clock, manually infer the pre-defined differential gt_refclk type interface, and bond the top-level GT reference clock signals to the interface. Thus, it is easy to connect the GT reference clock interface to the corresponding interface provided in the Alveo target platform.
An additional XDC file ./xdc/aurora_64b66b_0.xdc is packed into the kernel file as well, since the generated Aurora IP does not have the reference clock definition for top level integration.
We will use make command to call this script to generate the kernel file krnl_aurora.xo later.