Create workspace and launch the AMD Vivado™ Design Suite.
Run the following command to create a workspace and launch Vivado in the console.
mkdir WorkSpace #create workspace cd WorkSpace source <Vivado_Install_Directory>/settings64.sh
Download the Versal Customer Extensible Embedded Platform Example.
Click menu Tools -> Vivado Store...
Click OK to agree to download open source examples from web.
Select Example Designs ->Platform -> Versal Extensible Embedded Platform part_support , and click the download button on the tool bar.
Click Close after the installation is complete.
Create the Versal Extensible Embedded Part Support Platform Example project.
Click File -> Project -> Open Example...
Select Versal Extensible Embedded Platform (Part based) in Select Project Template window. Then click Next.
In Project Name dialog set Project name to custom_hardware_platform, and confirm your project location is in Workspace directory. Keep Create project subdirectory option checked. Then, click Next.
In default part dialog, select the silicon model. Select XCVC1902-vsva2197-2MP-e-S as the chip on VCK190 board is
XCVC1902-vsva2197-2MP-e-S, which you can find on board user manual.
Click Next. The following table displays.
Configure the Clocks Settings. You can enable more clocks, update output frequency, and define default clock in this view. In this example, you can keep the default settings.
Configure the Interrupt Settings. You can choose how many interrupt should this platform supports. 63 interrupts mode will use two
AXI_INTCin cascade mode. In this example, you can keep the default setting.
Enable AIE or not. In this example, you can keep the default setting.
Review the new project summary and click Finish.
After a while, you will see the design example has been generated.
The generated design is simliar to the following:
At this stage, the Vivado block automation has added a Control, Interface & Processing System (CIPS) block, AXI NOC block, AI Engine, and all supporting logic blocks to the diagram. However, board level-related configurations are not set as different board has different resources. Then you will configure the CIPS PS part and DDR related parameters according to the board.