If you encounter any issues when creating the custom platform and the validation application in this tutorial, you can run make all COMMON_IMAGE_ZYNQMP=<path/to/common_image/> in the ref_files directory to generate the reference design and compare with your design. COMMON_IMAGE_ZYNQMP is a flag to specify the common image path. Please download common image from Xilinx website download page and give the path to the flag.
The command line flow has slight differences comparing to Vitis IDE flow.
The vector addition application is called
vadd_hostandbinary_container_1.xclbinin Vitis Unified IDE flow. The generated files in command line flow are calledsimple_vaddandkrnl_vadd.xclbin.