Configurations for Fixed Point Implementation (Recommended Flow) - 2023.2 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.2 English

1-D SSR FFT supports multiple scaling modes and provides options to define input bit-widths and bit-width required to store exponential values (sin/cos in look-up tables). The signal to noise ratio that defines the quality of the output signal depends on the choice of these different parameters and also on the quantification scheme used for converting real valued continuous signal or floating point signal to fixed point. The range and the resolution of the signal, essentially the integer bits and the fraction bits, should be selected carefully to have good signal-to-noise ratio (SNR) at the output of the SSR FFT. Following is the recommended flow for working with 1-D SSR FFT HLS IP for fixed point implementation.