Implementation on FPGA - 2023.2 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.2 English

The internal structure of SHA-2 algorithms can be shown as the figure below:

Structure of SHA-2 algorithms

As we can see from the figure, the SHA-2 hash calculation can be partitioned into two main parts.

  • The pre-processing part pads or splits the input message into fixed sized blocks, and informs the down-stream parts that how many blocks do we have in this message. The message word size is 32-bit for SHA-224/SHA-256, 64-bit for the rest 4 algorithms, and each block has a size of 16 message words.
  • The digest part iteratively computes the hash values. Loop-carried dependency is enforced by the algorithm, and thus this part cannot reach II=1.

As these two parts can work independently, they are designed into parallel dataflow process, connected by streams (FIFOs).

The dup_strm module is used to duplicate the number of block stream, and generateMsgSchedule module is responsible for generating the message word stream in sequence.