cache is a URAM design for caching Read-only DDR/HBM memory spaces
This function stores history data recently loaded from DDR/HBM in the on-chip memory(URAM). It aims to reduce DDR/HBM access when the memory is accessed randomly.
Parameters:
| T | The type of the actual data accessed. Float and double is not supported. |
| ramRow | The number of rows each on chip ram has |
| groupramPart | The number of on chip ram used in cache |
| dataOneLine | The number of actual data each 512 can contain |
| addrWidth | The width of the address to access the memory |
| validRamType | The ram type of the valid flag array. 0 for LUTRAM, 1 for BRAM, 2 for URAM |
| addrRamType | The ram type of the onchip addr array. 0 for LUTRAM, 1 for BRAM, 2 for URAM |
| dataRamType | The ram type of the onchip data array. 0 for LUTRAM, 1 for BRAM, 2 for URAM |
template < typename T, int ramRow, int groupRamPart, int dataOneLine, int addrWidth, int validRamType, int addrRamType, int dataRamType > class cache