Look Up Table - 2023.2 English

The LUT function performs the table lookup operation. Transforms the source image into the destination image using the given look-up table. The input image must be of depth XF_8UP and the output image of same type as input image.

I_out(x, y) = LUT [I:sub:in1(x, y)]

Where:

I_out(x, y) is the intensity of output image at (x, y) position
I_in(x, y) is the intensity of first input image at (x, y) position
LUT is the lookup table of size 256 and type unsigned char.

API Syntax

template <int SRC_T, int ROWS, int COLS,int NPC=1, int XFCVDEPTH_IN = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_OUT = _XFCVDEPTH_DEFAULT>
void LUT(xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_IN> & _src, xf::cv::Mat<SRC_T, ROWS, COLS, NPC, XFCVDEPTH_OUT> & _dst,unsigned char* _lut)

Parameter Descriptions

The following table describes the template and the function parameters.

Table 635 Table . LUT Parameter Description
Parameter	Description
SRC_T	Input and Output pixel type. Only 8-bit, unsigned, 1 and 3 channels are supported (XF_8UC1 and XF_8UC3)
ROWS	Number of rows in the image being processed.
COLS	Number of columns in the image being processed. Must be a multiple of 8, for 8-pixel operation.
NPC	Number of pixels to be processed in parallel. Possible options are XF_NPPC1 and XF_NPPC8 for 1 pixel and 8 pixel operations respectively.
_src	Input image of size (ROWS, COLS) and type 8U.
_dst	Output image of size (ROWS, COLS) and same type as input.
_lut	Input lookup Table of size 256 and type unsigned char.

Resource Utilization

The following table summarizes the resource utilization of the LUT function, generated using Vivado HLS 2019.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1 FPGA, to process a grayscale HD (1080x1920) image.

Table 636 Table . LUT Function Resource Utilization Summary
Operating Mode	Operating Frequency (MHz)	Utilization Estimate
Operating Mode	Operating Frequency (MHz)	BRAM_18K	DSP_48Es	FF	LUT	CLB
1 pixel	300	1	0	937	565	137
8 pixel	150	9	0	1109	679	162

The following table summarizes the resource utilization of the LUT function, generated using Vivado HLS 2019.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1 FPGA, to process 4K 3Channel image.

Table 637 Table . LUT Function Resource Utilization Summary
Operating Mode	Operating Frequency (MHz)	Utilization Estimate
Operating Mode	Operating Frequency (MHz)	BRAM_18K	DSP_48Es	FF	LUT	CLB
1 pixel	300	4	0	1160	648	175

Performance Estimate

The following table summarizes the performance in different configurations, as generated using Vivado HLS 2019.1 tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1, to process a grayscale HD (1080x1920) image.

Table 638 Table . LUT Function Performance Estimate Summary
Operating Mode	Latency Estimate
Operating Mode	Max Latency (ms)
1 pixel operation (300 MHz)	6.92
8 pixel operation (150 MHz)	1.66