Bad Pixel Correction - 2023.2 English

Vitis Libraries

Release Date
2023-12-20
Version
2023.2 English

An image sensor may have a certain number of defective/bad pixels that may be the result of manufacturing faults or variations in pixel voltage levels based on temperature or exposure. The Badpixelcorrection module removes the defective pixels in the image using below operation.

If the middle pixel value is lesser than minimum neighborhood value, will consider minimum neighborhood value as mid pixel, otherwise mid pixel value is greater than maximum neighborhood value, will consider maximum neighborhood as mid pixel.

API Syntax

template<int TYPE, int ROWS, int COLS, int NPPC=1, int USE_URAM=0, int XFCVDEPTH_IN_1 = _XFCVDEPTH_DEFAULT, int XFCVDEPTH_OUT_1 = _XFCVDEPTH_DEFAULT, int BORDER_T=XF_BORDER_CONSTANT>
void badpixelcorrection(xf::cv::Mat<TYPE, ROWS, COLS, NPPC, XFCVDEPTH_IN_1> & _src,xf::cv::Mat<TYPE, ROWS, COLS, NPPC, XFCVDEPTH_OUT_1> & _dst)

The following table describes the template and the function parameters.

Table 294 Table badpixelcorrection Parameter Description
Parameter Description
TYPE Input and Output Pixel Type.XF_8UC1,XF_16UC1 are supported
ROWS Maximum height of input and output image (Must be multiple of NPPC)
COLS Maximum width of input and output image (Must be multiple of NPPC)
NPPC Number of Pixels to be processed per cycle.XF_NPPC1,XF_NPPC2 ,XF_NPPC4 and XF_NPPC8.
BORDER_T Border Type supported is XF_BORDER_CONSTANT
USE_URAM Enable to map storage structures to UltraRAM.
XFCVDEPTH_IN_1 Depth of input image
XFCVDEPTH_OUT_1 Depth of output image
_src Input Bayer image
_dst Output Bayer image

Resource Utilization

The following table summarizes the resource utilization of the kernel in different configurations, generated using Vivado HLS 2019.2 tool for the Xilinx xc7vx485t-ffg1157-1 FPGA, to process a 4K image.

Table 295 Table badpixelcorrection Resource Utilization Summary
Operating Mode

Operating Frequency

(MHz)

Utilization Estimate        
BRAM_18K DSP_48Es FF LUT SLICE
1 pixel 300 10 0 979 744 355
2 pixel 300 10 0 1148 1177 458

Performance Estimate

The following table summarizes a performance estimate of the kernel in different configurations, as generated using Vivado HLS 2019.2 tool for the Xilinx xc7vx485t-ffg1157-1, to process 4K image.

Table 296 Table badpixelcorrection Resource Utilization Summary
Operating Mode

Operating Frequency

(MHz)

Latency Estimate
Max (ms)
1 pixel 300 27.8
2 pixel 300 14.2