1.2 Getting to Know the Power Advantage Tool Control Console

Zynq UltraScale plus MPSoC Power Management

Release Date
2022-07-26
  • Zoom Display (transparent button [ ]) (A) resizes to fill a 1920x1080 display.
  • Close (transparent button [X]) (B)
  • Minimize (C)
  • Select (D) Selects the display mode (Rails, Plot, About contains the version number)
  • Preset (E) Places the ZCU102 into a selected state.
  • Block Diagram of Zynq (F) shows the current device state.
  • Power Totals for various domains (G) (Note: There can be a few seconds delay for measurement and update.)
Note:
  • VCCPSINTFP – Core Full Power Domain
  • MGTRAVCC – GTX Power
  • MGTRAVTT – GTX Termination Power
  • VCCO_PSDDR_504 – PS DDR Controller IO
  • VCCPSDDRPLL – PS DDR PLL Power
  • VCCPSINTLP – Core Low Power Domain
  • VCCPSAUX – Aux and GPIO
  • VCCPSPLL – PS PLL Power
  • VCCOPS – PS IO Banks MIO0/1/2
  • VCCOPS3 – Dedicated PS IO
  • VCCINT – PL Operating
  • VCCBRAM – Block RAM
  • VCCAUX – Auxiliary Circuits
  • VCC1V2 – DDR Termination
  • VCC3V3 – Main PMBUS Utility Rails
  • MGTAVCC – Receiver and Transmitter Internal
  • MGTAVTT – Transmit Driver
Note: