Clock Stop

Zynq UltraScale plus MPSoC Power Management

Release Date

When this feature is enabled, the DDR PHY is allowed to stop the clocks going to the DRAM. For DDR2 and DDR3, this feature is only effective in self-refresh mode. For LPDDR and LPDDR2, this feature becomes effective in Idle periods, Power-down mode, Self-refresh mode, and Deep power-down mode.