After Assertion/Deassertion of LC/RPLLPD for the PLL Being Used

Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)

Document ID
AM002
Release Date
2023-10-26
Revision
1.3 English

When the LCPLL or RPLL being used goes back to normal operation after power down, the PLL must be reset. Perform a full RX sequential reset after the PLL fully completes its reset procedure.