RX Clock Correction

The dedicated elastic FIFO on the 8B/10B datapath is designed to bridge between two different clock domains, RXUSRCLK and PHYCLK, which is the recovered clock from CDR. Even if RXUSRCLK and PHYCLK are running at same clock frequency, there is always a small frequency difference. Because PHYCLK and RXUSRCLK are not exactly the same, the difference can be accumulated to cause the 8B/10B elastic FIFO to eventually overflow or underflow unless it is corrected. To allow correction, each transceiver TX periodically transmits one or more special characters that the transceiver RX is allowed to remove or replicate in the 8B/10B elastic FIFO, as necessary. By removing characters when the 8B/10B elastic FIFO is too full and replicating characters when the 8B/10B elastic FIFO is too empty, the receiver can prevent overflow or underflow.