Reference Clock Power

Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)

Document ID
AM002
Release Date
2023-10-26
Revision
1.3 English

The GTY transceiver reference clock input circuit is powered by GTY_AVCC. Excessive noise on this supply has a negative impact on the performance of any GTY transceiver Quad that uses the reference clock from this circuit.