Transceiver RX Reset in Response to Completion of Configuration

Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)

Document ID
AM002
Release Date
2023-10-26
Revision
1.3 English

The RX reset sequence shown in RX Initialization and Reset is not automatically started to follow the global GSR.

These conditions must be met:

  1. RXRESETMODE must be set to use the sequential mode.
  2. GTRXRESET must be used.
  3. All RXPMARESETMASK, PCSRSVDIN[9:8] (RXDAPIRESETMASK), and RXPCSRESETMASK bits should be set to High.
  4. GTRXRESET cannot be driven Low until the associated PLL and ILO are locked.
  5. Ensure that GTPOWERGOOD is High before releasing LC/RPLLRESET, ILORESET, GTRXRESET, and PCSRSVDIN[10] (RXDAPIRESET).

If the reset mode is defaulted to single mode, then you must:

  1. Change the reset mode to Sequential mode.
  2. All RXPMARESETMASK, PCSRSVDIN[9:8] (RXDAPIRESETMASK), and RXPCSRESETMASK bits should be changed to High.
  3. Wait another 300–500 ns.
  4. Assert LCPLLRESET, RPLLRESET, ILORESET, GTRXRESET, and PCSRSVIND[10] (RXDAPIRESET) following the reset sequence described in the figure below.

Alternatively, the master reset controller can be used to drive the PLL and RX reset in sequence automatically. Details can be found in Transceiver Master Reset.

Figure 1. Receiver Initialization after Configuration