Using TX Pattern Generator

Versal Adaptive SoC GTY and GTYP Transceivers Architecture Manual (AM002)
Document ID
AM002
Release Date
2023-10-26
Revision
1.3 English
In all but one use mode, the TX pattern generator can be enabled by changing the value of the CH*_TXPRBSSEL port to select the desired pattern. When the TX asynchronous gearbox is enabled, these additional steps must be taken to enable the TX pattern generator:
  1. Put the PCS into reset by following the corresponding TX component reset procedure.
  2. Set attribute USE_GB to 1'b0 and TXBUF_BYPASS_MODE to 1'b0 via the APB3.
  3. Set attribute TXOUTCLKCTL to 3'b010 (TXPHYCLK).
  4. Set port CH*_TXPRBSSEL to the desired pattern.
  5. Release the PCS from reset by following the corresponding TX component reset procedure.
To return to TX asynchronous gearbox mode, the above changes must be reversed as described below:
  1. Put the PCS into reset by following the corresponding TX component reset procedure.
  2. Set the attribute USE_GB to 1'b1 and TXBUF_BYPASS_MODE to 1'b1 via the APB3.
  3. Set attribute TXOUTCLKCTL to 3'b101 (TXPROGDIVCLK).
  4. Set port CH*_TXPRBSSEL to 4'b0000.
  5. Release the PCS from reset by following the corresponding TX component reset procedure.