Use of the Deskew Logic

Versal Adaptive SoC Clocking Resources Architecture Manual (AM003)

Document ID
AM003
Release Date
2023-05-16
Revision
1.5 English

All involved settings can be set by using attributes to the MMCM and/or PLL, CLKOUTn_PHASE_CTRL[0:1].

Table 1. Deskew Logic Settings
Value Description
00 No interpolator control
01 Interpolator controlled by deskew 1
10 Interpolator controlled by fine phase shift
11 Interpolator controlled by deskew 2
DESKEW_DELAY1
Optional value to program the delay in the deskew circuit (0 to 63).
DESKEW_DELAY2
Optional value to program the delay in the deskew circuit (0 to 63).
DESKEW_DELAY_PATH1
Set what input, CLKIN1_DESKEW or CLKFB1_DESKEW passes through the delay line.
DESKEW_DELAY_PATH2
Set what input, CLKIN2_DESKEW or CLKFB2_DESKEW passes through the delay line.
DESKEW_DELAY_EN1
Enable the optional programmable delay.
DESKEW_DELAY_EN2
Enable the optional programmable delay.