Complex Multiply with MACC and MADD Operations

Versal ACAP DSP Engine Architecture Manual (AM004)

Document ID
AM004
Release Date
2022-09-11
Revision
1.2.1 English

MACC operation includes a 3-input adder (two from the multiplier partial product outputs) in the accumulator stage and requires guard bits to prevent overflow. For more information, refer to MACC.